Dr. Yorgos Makris is Professor in the Department of Electrical and Computer Engineering at the Erik Jonsson Polytechnic School of the University of Texas at Dallas, USA, where he leads the Research Laboratory of Trusted and Reliable Architecture (TRA) of the Texas Sector of the Texas Analog Center of Excellence (TxACE), as well as the Collaborative Interuniversity Research Center of the National Research Foundation of the United States. in the field of Hardware and Embedded Systems (National Science Foundation Industry University Cooperative Research Center (IUCRC) on Hardware and Embedded System Security and Trust (CHEST)). Prior to his current position, he was a faculty member in Yale University's Department of Electrical Engineering and Computer Science for a decade. Earlier, he completed his doctoral dissertation (2001) and his postgraduate studies (1997) in the Department of Computer Science and Engineering at the University of California, San Diego. Even earlier, he graduated from the Department of Computer Engineering and Informatics of the University of Patras (1995). His research interests focus on the applications of machine learning and statistical analysis in the design of reliable, trustworthy and secure electronic circuits and systems, with an emphasis on analog circuits and radio frequency circuits. It also deals with the detection of malware through the hardware, as well as the implementation of analogical learning methods in silicon and new computational methods using new technologies. He is an honorary member of the IEEE and has been honored with the Sheffield Award for Distinguished Teaching from Yale University in 2006, with the awards for best research publication from the Design Automation and Test in Europe (DATE) conferences in 2013 and the VLSI Test Symposium (VTS) in 2015 , with the Hardware Oriented Security and Trust (HOST) Conference for Best Material Demonstration Award in 2016 and 2018, as well as the Erik Jonsson Polytechnic Award from the University of Texas at Dallas, USA. in 2020.
Applications of Machine Learning in Hardware Security
Over the last fifteen years, hardware security and trust has evolved into a major new area of research at the intersection of semiconductor manufacturing, VLSI design and test, computer-aided design, architecture and system security. During the same period, machine learning has experienced a major revival in interest and has flourished from a nearly forgotten area to the talk of the town. In this presentation, we will first briefly review various machine learning-based solutions which have been developed to address a number of concerns in hardware security and trust, including hardware Trojan detection, counterfeit IC identification, provenance attestation, hardware-based malware detection, side-channel attacks, PUF modeling, etc. Then, we will examine the key attributes of these problems which make them amenable to machine learning-based solutions and we will discuss the potential and the fundamental limitations of such approaches. Lastly, we will ponder the role of and necessity for advanced contemporary machine learning methods in the context of hardware security and we will conclude with suggestions for avoiding common pitfalls when employing such methods.